This application relates generally to a device and method providing a new pixel architecture that contains both an on/off memory element and a switching element to utilize low-power liquid crystal displays for video or near-video applications.
It would be useful to produce cholesteric liquid crystal displays on flexible active matrix backplanes. Such devices would provide the potential for video rate applications in addition to the traditional low power benefits of bistable reflective displays. However, there are numerous obstacles to achieving a video rate display using conventional techniques, and thus it would be useful to provide solutions using a new pixel architecture that solves the problems of the prior art designs for utilization with bistable liquid crystal displays.
Conventional AMLCD Background
The gray level displayed at a pixel of a conventional twisted nematic (TN) liquid crystal display (LCD) is a function of the applied voltage. Voltages of approximately ±5V drive a pixel black, with brightness increasing nonlinearly as voltage amplitude decreases. As such, the frontplane voltage (VCOM) is typically set to around 5V. A source data driver is used that can provide data in the range (0 to VCOM) or (VCOM to 2VCOM) to a pixel depending on the frame and desired gray level. The two frames are used to provide the required DC balance. The maximum voltage possible (2VCOM) is typically up to about 18V.
In a traditional active matrix display, a single thin film transistor (TFT) is used at each pixel in order to set the voltage on the pixel for a given frame. The gates of all the TFTs in a display row are connected to a common input, while the sources of all TFTs in a column are connected to a common input. In the course of a single frame, the gates of each TFT row are turned ‘ON’ in succession for a duration of TLINE=TFRAME/N, where TFRAME is typically 1/60 Hz=16.7 ms and N is the number of rows in the display. The pixels in the row whose TFT gates are ‘ON’ are charged through the TFTs to the data voltage on the corresponding column for a duration of TLINE. The pixel is undriven and holds it voltage, generally with the assistance of a storage capacitor, for the remainder of TFRAME.
The TFT gate drivers may drive ‘OFF’ gates with approximately −5V and ‘ON’ gates with approximately +30V. This permits the ‘OFF’ TFTs be driven off by at least VGS=−5V (=−5V-0V) and the ‘ON’ TFTs to be driven on by at least VGS=20V (=30V-10V). The TFTs are turned on very hard because 20V is much greater than the TFT threshold voltages. This permits TLINE to be low, which supports high frame rates (TFRAME small) on large displays (N large).
Video Rate ChLCD Drive Waveforms
A Cholesteric LCD (ChLCD), which is a bistable LC technology, requires fundamentally different driving waveforms than does a conventional LCD. In particular, the ChLCD appears dark while the drive voltage is on a pixel. Only after the voltage is removed does the pixel relax to a brighter appearance. ChLCD can be configured to provide power consumption improvements over traditional displays, but an effective active matrix driver for such displays for video or near-video applications is wanting. Desired is a method and apparatus for actively driving a ChLCD device to support higher refresh rates, such as for supporting video applications, while providing potential power saving benefits associated with ChLCDs.